By Ed Sperling
Mentor’s Dennis Brophy looks back on the life of the man who first pulled him into the standards world, Don Loughry. It’s a good story and a great eulogy to one of the stars of the standards effort.
Cadence’s Richard Goering examines an all-too-common phenomenon in testing a chip—exploding it. Testing a chip with everything on is a lot different than testing it with the normal functional power. Make sure you check out the photo.
Synopsys’ Navraj Nandra looks at non-volatile memory and why it’s important for smartphones with near-field communications. When you swipe your phone, speed and battery life are critical.
How many TVs can U.S. households hold? Apparently not as many as TV makers would like. IHS iSuppli’s Lisa Hatamiya predicts flat panel shipments will fall for the first time ever this year.
Mentor’s Michael Ford compares the taming of young music students to orchestrating of the chip manufacturing process. Just imagine if Toscanini had been in charge of a 28nm fab.
Cadence’s Adam Sherer digs into verification of power-aware designs and why they should be running low power in every regression test.
In case you’ve wondered where you can augment your verification skills for AMS, Synopsys’ Helene Thibieroz details who’s teaching this summer at UC Santa Cruz. Bring your surfboard.
Mentor’s Mike Jensen rolls out Part 5 of his analog modeling epic, this one focusing on implementation of equations using VHDL-AMS.
And in case you missed the most recent issue of the System-Level Design newsletter, here are some standout blogs:
–Mentor’s Jon McDonald sheds light on cycle-accurate models and why they’re not always necessary or even good.
–Synopsys’ Achim Nohl shares some insights about virtualization and ARM’s big.LITTLE processor.
–Cadence’s Frank Schirrmeister steps back and assesses how many of ESL’s core pieces have moved beyond the early adopter phase.
–Sonics’ Frank Ferro asserts that speed is still the crucial requirement for all SoCs. Damn the torpedoes, full speed ahead.
–Arteris’ Kurt Shuler looks ahead to the coming shakeout in the design industry and who’s going to be affected.
–Atrenta’s Mike Gianfagna compares SoC development to an old video game with much higher stakes.
–eSilicon’s Javier DeLaCruz looks at which companies will be the drivers of TSV packaging.
–Methodics’ Simon Butler expounds on the continuous build approach and why it’s necessary to take SoC design out of the Dark Ages.
